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 | | The Complete Verilog Book by Vivek Sagdeo ISBN-10: 9780792381884 ISBN-10: 0-7923-8188-2 ISBN-13: 9780792381884 ISBN-13: 978-0-7923-8188-4 Hardcover 1998-06-30 Springer Find Lowest Price |
Editorials | ||
Product Description The Verilog hardware description language provides the ability to describe digital and analog systems for design concepts and implementation. It was developed originally at Gateway Design and implemented there. Now it is an open standard of IEEE and Open Verilog International and is supported by many tools and processes. The Complete Verilog Book introduces the language and describes it in a comprehensive manner. In The Complete Verilog Book, each feature of the language is described using semantic introduction, syntax and examples. A chapter on semantics explains the basic concepts and algorithms that form the basis of every evaluation and every sequence of evaluations that ultimately provides the meaning or full semantics of the language. The Complete Verilog Book takes the approach that Verilog is not only a simulation language or a synthesis language or a formal method of describing design, but is a totality of all these and covers many aspects not covered before but which are essential parts of any design process using Verilog. The Complete Verilog Book starts with a tutorial introduction. It explains the data types in Verilog HDL, as the object-oriented world knows that the language-constructs and data types are equally important parts of a language. The Complete Verilog Book explains the three views, behavioral, RTL and structural and then describes features in each of these views. The Complete Verilog Book keeps the reader abreast of current developments in the Verilog world such as Verilog-A, cycle simulation, SD, and DCL, and uses IEEE 1364 syntax. The Complete Verilog Book will be useful to all those who want to learn Verilog HDL and to explore its various facets. | ||
Reviews | ||
Good book, high price! I liked the approach of describing the gate model, dataflow and behavioral model, all in one place, unlike other books. The text is mostly very clear. More state diagrams here and there may clarify. Unfortunatly PLI is not really covered. The CD rom contains only the code: other books provide a free (student version) vhdl simulator. At $ 135.00 + tax, the price is high, compared to other similar books covering the same topic. A.G. - San Jose, CA | ||
Good reference mediocre for learning. The book has plenty of code samples, however, many of them have mistakes, making it difficult and sometimes frustrating to study the code. The explanations are not well written when compared to other books (Thomas and Moorby's), however there is some information that cannot be found in other books. An excellent book except for the price and mistakes on nearly every page. If you are already experienced in Verilog, this may be an excellent reference, however, if you are just learning, Thomas Moorby's "The Verilog Hardware Description Language" is an excellent and highly recommended book. | ||
a great book with almost everything for designers to referen This book is really a worthwhile book to read and study for advanced topics of designs based on Verilog and Synopsys synthesis tools. The feature-rich topics and details of how the constructs of the designs are made are quite clear and well-written for people involved. The only thing I'm concerned is the price seems to be way way too high to general reader, as it's $135 before tax. Hopefully the price can drop at least 40% less so that everybody can buy it. regards, JKL, San Jose, Calif. | ||